In recent years, an LSI (semiconductor integrated circuit) divided into a plurality of power supply blocks has been developed. By performing ON/OFF control of power supply or DVFS (Dynamic Voltage and Frequency Scaling) control of a specific power supply block, the power consumption of the LSI can be reduced. The DVFS control dynamically controls the power supply voltage and the operating frequency.
However, poor conditions of products associated with a change in the power supply voltage or the ON/OFF control of the power supply voltage frequently happen, and therefore enhancement of a verification technique is desired. It has been known that most of failures in the LSI are often caused by the operation composed of complicated operations of both software and hardware.
At present, however, the verification about the power supply management control is usually performed by a software simulator, in which case there is a problem that debugging of software such as an actual power supply management application or the like cannot be appropriately performed in terms of simulation execution time.
Therefore, a technique becomes necessary which verifies the power supply management control by a hardware emulator or FPGA (Field Programmable Gate Array) capable of verification at a higher speed than simulation. An existing hardware emulator is composed of an FPGA and a dedicated processor and cannot perform ON/OFF of the power supply voltage and dynamic change of the power supply voltage of a specific logic block, in which there is a problem that a high-speed verification technique for the power supply management control by the hardware emulator or FPGA has not been established.
Japanese Laid-open Patent Publication No. 2006-31408 discloses a verification technique by an emulator to solve such problems. However, this is based on the assumption that there is an emulator which can monitor the power supply voltage and is not considered to be a direct solution unless such emulator and FPGA exist at present.